Integrated circuits (ICs) or chips employ capacitors for charge storage purposes. An example of an IC that employs capacitors for storing charge is a memory IC, such as a dynamic random access memory (DRAM) chip. The level of the charge ("0" or "1") in the capacitor represents a bit of data.
A DRAM chip includes an array of memory cells interconnected by rows and columns. Typically, the row and column connections are referred to as wordlines and bitlines, respectively. Reading data from or writing data to the memory cells is accomplished by activating the appropriate wordlines and bitlines.
Typically, a DRAM memory cell comprises a transistor connected to a capacitor. The transistor includes two diffusion regions separated by a channel, above which is located a gate. Depending on the direction of current flow between the diffusion regions, one is referred to as the drain and the other the source. The terms "drain" and "source" are herein used interchangeably to refer to the diffusion regions. The gate is coupled to a wordline, one diffusion region is coupled to a bitline, and the other diffusion region is coupled to the capacitor.
Applying an appropriate voltage to the gate switches the transistor "on," enabling current to flow through the channel between the diffusion regions to form a connection between the capacitor and bitline. Switching off the transistor severs this connection by preventing current from flowing through the channel.
One type of capacitor that is commonly employed in DRAMs is the trench capacitor. A trench capacitor is a three-dimensional structure formed in the substrate. Typically, a trench capacitor comprises a deep trench etched into the substrate. The trench is filled, for example, with n-type doped poly. The doped poly serves as one electrode of the capacitor (referred to as the "storage node"). An n-type doped region surrounds the lower portion of the trench, serving as a second electrode. The doped region is referred to as a "buried plate." A node dielectric separates the buried plate and the storage node.
A conventional technique for forming the buried plate includes outdiffusing dopants into the region of the substrate surrounding the lower portion of the trench. The dopant source is typically provided by an n-type doped silicate glass such as, for example, arsenic doped silicate glass (ASG).
After formation of the buried plate, the node dielectric is deposited to line the sidewalls of the trench. However, conventional techniques for forming a buried plate result in the trench sidewalls having a relatively rough surface. The rough surface of the trench sidewalls degrades the quality of the node dielectric, adversely affecting yields.
From the above discussion, it is desirable to provide a trench capacitor having reduced surface roughness in the trench sidewalls.